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Low Power Mode
Low Power Mode
The TigerSHARC processor can enter sleep mode, where the Tiger-
SHARC processor does not operate and power consumption is minimal.
This feature is useful for systems that require a low power standby mode.
Low power mode is entered as described below. The TigerSHARC proces-
sor returns to normal operation after an external interrupt (falling edge on
the
pin) occurs.
IRQ
Entering Low Power Mode
The TigerSHARC processor enters into low power mode using the
instruction. The procedure to follow in order to enter low
IDLE(LP);;
power mode depends on the processor system. This procedure is described
in the following sections.
Single Processor System
In a single processor system, low power mode can be entered after the fol-
lowing procedure.
1. Ensure that the interrupt that wakes the TigerSHARC processor is
enabled.
2. Stop all the DMA channels. This can be done by setting all the
bits in the
PAUSE
Register" on page 7-26.
3. Check that the link is not in the middle of a transmit or receive
transaction. If it is controlled by the DMA, it stops at the end of
the quad-word; otherwise the application can control it.
4. Check that the external bus OFIFO and IFIFO are empty. DMA
transactions are not be issued after step 2 is executed. To check that
all the transactions are complete and to ensure that the OFIFO and
IFIFO are empty, initiate a write to an internal address via the
3-6
register. For more information, see "DCNT
DCNT
ADSP-TS101 TigerSHARC Processor
Hardware Reference
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