Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 238

Table of Contents

Advertisement

In the case of a receiver
the number of words to be received, the address increment and the control
bits.
Figure 7-2. DMA TCB Register
The
register is the 32-bit Index register for the DMA. This contains the
DI
source or destination of the data to be transmitted or received and can
point to internal, external memory, or the link ports.
The
register contains a 16-bit count value and a 16-bit modify value.
DX
The count value is stored in the upper 16 bits (16-31) and the modify in
the lower (0-15). If a two-dimensional DMA is enabled, then this register
contains the modify and count values for the X dimension only. The value
of X count must always be the number of normal (32-bit) words to be
transferred. Likewise, the modify value is the number of normal words to
modify the count. For example, if we wanted to transmit four quad-words
(16 normal words), then the count value would be 0x10 and the modify
value 0x4 if the operand length in the
the operand length was set to long-word, then the modify value would be
0x2. Programming the DMA
viously described. Figure 7-3 on page 7-6 shows some of the many options
available for DMA operation.
!
There are two restrictions that need to be considered when pro-
gramming the DMA
an aligned boundary as specified by the operand length in the
field. For example, it is not possible to set up a DMA
operand length of quad-word and a modify value of two as this
results in a quad-word being transmitted from a non-quad-aligned
7-4
these four words contain destination address,
TCB
31
DI REGISTER
63
DX REGISTER
95
DY REGISTER
127
DP REGISTER
register is set to quad-word. If
DP
parameters is not limited to those as pre-
TCB
s. The first is that the pointer must fall on
TCB
ADSP-TS101 TigerSHARC Processor
0
32
64
96
TCB
Hardware Reference
DP
with an

Advertisement

Table of Contents
loading

Table of Contents