Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 360

Power, Reset, and Clock Input Considerations
EZ-KIT Lite. The processor remains in the
ten to the
TMRINx
is generated and the interrupt service routine is executed.
Listing 10-5. Set an Interrupt
/*Timer Example to demonstrate toggling flag within a High Prior-
ity Timer Interrupt*/
.section program;
register*/
xr0 = bset r0 by INT_TIMER0H_P;;
timer0 interrupt*/
IMASKH = xr0;;
j0 = timer_isr_routine;;
high priority interrupt*/
IVTIMER0HP = j0;;
Table*/
TMRIN0H = 0x00000000;;
counter with value*/
TMRIN0L = 0x0EE6B280;;
counter with value*/
xr0 = SQCTL_TMR0EN;;
register*/
SQCTLST = xr0;;
wait: idle;;
generated*/
jump wait;;
timer_isr_routine:
xr0 = SQCTL;;
xr0 = btgl r0 by SQCTL_FLAG2_OUT_P;;
Flag 2 pin (bit 26)*/
10-14
registers decrements to zero. At that point the interrupt
xr0 = IMASKH;;
/*Write contents back to IMASKH register*/
/*Load address of ISR for Timer0
/* Load address of Timer0 HP ISR into IV
/*Load Upper 32-bits of Timer0
/*Load Lower 32-bits of Timer0
/*Set Time0 run bit in the SQCTL
/*Enable Timer0*/
/*Sit in IDLE until timer0 interrupt is
/* Timer0 interrupt service routine*/
/*Read the Sequence Control Register*/
ADSP-TS101 TigerSHARC Processor
state until the value writ-
IDLE
/*Read contents of IMASKH
/*Unmask high priority
/* Toggle the value of
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