DMA Controller Features
Once receiver
automatically and the link port waits until data is received. The
link port then generates a DMA request, and the DMA transfer to
external/internal memory completes. This process continues until
the block transfer is completed.
• Link port to external/internal memory transfers
Receiver DMA
nal/internal memory address, the address increment, the number of
transfers, and the control bits.
Once receiver
automatically and the link port waits until data is received. The
link port then generates a DMA request and the DMA transfer to
external/internal memory completes. This process continues until
the block transfer is completed.
Two-Dimensional DMA
The DMA is able to address and transfer two-dimensional memory arrays,
where X and Y array dimensions are defined in transmitter and receiver
registers.
TCB
• Receiver array dimensions can differ from those of the transmitter,
as long as the total number of words in source and destination are
equal.
• A two-dimensional memory array can be moved to a one-dimen-
sional array and vice versa, as long as the total number of words in
source and destination are equal.
• A two-dimensional block in memory can be transmitted via links,
or a block received through links or from AutoDMA can be placed
in memory as a two-dimensional array.
7-10
programming is completed, DMA transfers start
TCB
registers are programmed with the exter-
TCB
programming is completed, DMA transfers start
TCB
ADSP-TS101 TigerSHARC Processor
Hardware Reference
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