Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 4

Recommendations for Improving Our Documents .................. xxvi
Conventions ............................................................................... xxvii
INTRODUCTION
DSP Architecture ......................................................................... 1-6
Compute Blocks ..................................................................... 1-8
Arithmetic Logic Unit (ALU) .............................................. 1-9
Multiply Accumulator (Multiplier) .................................... 1-11
Bit Wise Barrel Shifter (Shifter) ........................................ 1-11
Integer Arithmetic Logic Unit (IALU) ................................... 1-12
Program Sequencer ............................................................... 1-13
Quad Instruction Execution .............................................. 1-14
Relative Addresses for Relocation ...................................... 1-15
Nested Call and Interrupt ................................................. 1-15
Context Switching ............................................................ 1-15
Internal Memory and Other Internal Peripherals .................... 1-16
Internal Buses ................................................................... 1-16
Internal Transfer ............................................................... 1-17
Data Accesses ................................................................... 1-17
Quad Data Access ............................................................. 1-17
Scalability and Multiprocessing ............................................. 1-18
External Port ......................................................................... 1-19
External Bus and Host Interface ........................................ 1-19
External Memory .......................................................... 1-19
Multiprocessing ............................................................ 1-20
iv ADSP-TS101 TigerSHARC Processor
Hardware Reference