Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 216

SDRAM Programming
The setup of Bits10–9 in the
Table 6-8.
Table 6-8. Precharge to RAS Delay (t
Delay SDRCON Bits10–9
2 cycles 00
3 cycles 01
4 cycles 10
5 cycles 11
Selecting the RAS to Precharge Delay (t
The t value (
RAS
number of system clock cycles (
troller issues an
The setup of Bits13–11 in the
in Table 6-9.
Table 6-9. RAS to Precharge Delay (t
Delay SDRCON Bits13–11
2 cycles 000
3 cycles 001
4 cycles 010
5 cycles 011
6 cycles 100
7 cycles 101
8 cycles 110
6-26
SDRCON
to Precharge Delay) defines the required delay, in
RAS
SCLK
command and the time it issues a
ACT
SDRCON
register for this parameter is shown in
) Bits
RP
), between the time the SDRAM con-
register for this parameter is shown
) Bits
RAS
ADSP-TS101 TigerSHARC Processor
Hardware Reference
)
RAS
command.
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