Emulation Mode - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

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Emulation Mode

Emulation mode is used when controlling the processor with an emulator
tool via the JTAG port. The TigerSHARC processor enters emulation
mode when an emulation exception is generated. An emulation exception
is generated after any one of these events:
EMUTRAP
• Watchpoint when programmed to cause emulation trap
• JTAG private instruction
• TMS change while
Emulation exceptions are the highest priority exceptions or interrupts.
While the TigerSHARC processor is in emulation mode, the only source
of instructions is the
JTAG Test Access Port (TAP). When entering this mode, the external
JTAG controller (Analog EZ-ICE or other customer hardware) must be
enabled. For more information, see "Sequencer Control Register –
SQCTL" on page 2-16. Once the emulation features are enabled and an
emulation exception is encountered, the TigerSHARC processor enters
emulation mode. Once the TigerSHARC processor is operating in emula-
tion mode, the only way it can exit emulation mode is by executing a
return from interrupt (
In emulation mode, the debug registers (Ureg group 0x1B) can be
accessed only by move register-to-register or immediate data load instruc-
tions. These registers cannot be loaded from or stored to memory directly.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
instruction
bit in
TEME
register. The
EMUIR
).
RTI
is set
EMUCTL
register is loaded via the
EMUIR
Core Controls
3-3

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