Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 133

j0 = j31 + TIMER0HP_ISR;;
interrupt vector*/
IVTIMER0HP = j0;;
j0 = j31 + TIMER1HP_ISR;;
interrupt vector*/
IVTIMER1HP = j0;;
/*Unmask Timer Interrupts*/
xR0 = IMASKH;;
other IMASK bits previously set*/
xR1 = 0x10300000;;
xR0 = R0 or R1;;
IMASKH = xR0;;
TIMER1HP interrupts */
/* Trigger TIMER0HP Interrupt & TIMER1HP Interrupt*/
TMRIN0H = 0x0;; TMRIN0L = 0xF;; TMRIN1H = 0x0;; TMRIN1L =
0xA;; /*Set timer lengths*/
xR0 = 0x00003000;; /*Turn on Timer 0 and 1*/
SQCTLST = xR0;;
Done: idle; nop; nop; nop;;
align_code 4;
jump Done (NP); nop; nop; nop;;
TIMER0HP_ISR:
nop;; nop;; nop;; nop;;
j0= j31+register_store;;
going to use in the ISR*/
q[j0+=4]=xr3:0;;
xR0 = RETIB;;
priority ISRs*/
xr1=r3+r4;;
RETIB = xR0;;
other interrupts*/
ADSP-TS101 TigerSHARC Processor
Hardware Reference
/*Make sure that we are not clearing
/* enable Global HW, TIMER0HP, and
/*Lower priority of the two timers*/
/*Clears Pmask[60], can now jump to higher
/*Any code for the ISR would go here*/
/*Sets Pmask[60], can no longer leave ISR for
/* set TIMER 0 High Priority
/* set TIMER1 High Priority
/*Store registers that we are
Interrupts
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