Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 214

SDRAM Programming
ADDR14
20
D Q
CTRL6
SDRAM BANK 1
ADDR & CTRL
20
D
Q
SDRAM BANK 2
ADDR & CTRL
REGISTERED
ADSP-TS101
BUFFERS
RAS
I0
C
CAS
I 1
O
SDWE
I 2
N
T
LDQM I 3
R
I 4
SDCKE
O
MSSD
I 5
L
OxA13-0
A13-11
A9-0
IX13-0
SDA10
O xB13-0
CLK
DATA31-0
Figure 6-6. Uniprocessor System With Multiple SDRAM Devices (32-bit
Bus)
6-24
O0A
O1A
O2A
O3A
O4A
O5A
AA13:0
O0B
O 1B
O 2B
O3B
O4B
O5B
AB13:0
SDRAM #1
RAS
4M X 4 X 4
CAS
WE
DQM
3-0
DATA3-0
CKE
CLK
CS
A13-0
SDRAM #2
RAS
4M X 4 X 4
CAS
WE
DQM
7-4
DATA3-0
CKE
CLK
CS
A13-0
SDRAM #3
RAS
4M X 4 X 4
CAS
WE
DQM
11-8
DATA3-0
CKE
CLK
CS
A13-0
AB13-0
SDRAM #4
RAS
4M X 4 X 4
CAS
WE
DQM
15-12
DATA3-0
CKE
CLK
CS
A13-0
ADSP-TS101 TigerSHARC Processor
Hardware Reference
SDRAM #5
RAS
4M X 4 X 4
CAS
WE
DQM
19-16
DATA3-0
CKE
CLK
CS
A13-0
SDRAM #6
RAS
4M X 4 X 4
CAS
WE
DQM
23-20
DATA3-0
CKE
CLK
CS
A13-0
SDRAM #7
RAS
4M X 4 X 4
CAS
WE
DQM
27-24
DATA3-0
CKE
CLK
CS
A13-0
SDRAM #8
RAS
4M X 4 X 4
CAS
WE
DQM
31-28
DATA3-0
CKE
CLK
CS
A13-0