Internal To External Memory - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

External Port DMA
Table 7-6. AutoDMA Register Channel Operation
– Internal Memory TCB
Receiver TCB Configuration
Register Field
DI
DX
DY
DP TY
DP PR
DP 2DDMA
DP LEN
DP INT
DP DRQ
DP CHEN
DP CHTG
DP CHPT

Internal to External Memory

Consider the case where the transfer direction is from internal to the
external memory. The configurations for transmitter and receiver
described in Table 7-7 on page 7-55 and Table 7-8 on page 7-56
respectively.
7-54
Description
Internal memory address
Number of words to transfer and address modifier. The
refers to X dimension data when the
Number of Y dimension words to transfer and address modifier when
bit is set in the
2DDMA DP
Internal memory
Channel priority – must always be set to 1
Sets the two-dimensional DMA mode
1 – Enables two-dimensional DMA mode;
relevant. (See "Two-Dimensional DMA" on page 7-45.)
Can be word, double word, or quad-word.
Sets interrupt
1 – Interrupts the core once the complete block is transferred.
Must always be set to 1.
Sets chaining mode
1 – Enables chaining
Defines register to be loaded; must be the same channel.
TCB
Chaining pointer – relevant when chaining is enabled.
ADSP-TS101 TigerSHARC Processor
bit is set in the
2DDMA
register; otherwise irrelevant.
register becomes
DY
Hardware Reference
register also
DX
register.
DP
s are
TCB