Two-Dimensional Dma Operation - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

DMA Controller Operations
block transfer is complete. If chaining is enabled, the chain pointer field
( ) in the
CHPT TCB DP
memory containing the next set of DMA parameters.

Two-Dimensional DMA Operation

A two-dimensional DMA transfer occurs in the following manner:
• First Phase
• The current address stored in the
and a DMA memory cycle is initiated.
• In the same cycle, the X modify value stored in the
Modify
register.
• The
• If the decremented
executed.
• Second Phase
• The X count is restored into the
the
• The Y increment value in the
current address in the
• The
• If the Y count is zero, the DMA sequence is ended and the
channel becomes inactive until the next pointer is written
again.
A key feature of two-dimensional DMA sequence (or any DMA sequence)
is the first DMA transfer begins before the address is modified. This
means the DMA cannot be disabled by setting either the
the
TCB DY Count
bit must be set to zero in the
DMA channel, the
7-46
register points to the start of a buffer in internal
register is added to the current address in the
register is decremented.
TCB DX Count
TCB DX Count
register.
DCIX
register is decremented.
TCB DY Count
to zero. To disable two-dimensional DMA, the
TCB DP Control
field should be reset in the
TY
ADSP-TS101 TigerSHARC Processor
TCB DI
is zero, the second phase is
TCB DX Count
register is added to the
DMA
register.
TCB DI
register. To disable the
TCB DP
Hardware Reference
register is output
TCB DX
TCB DI
register from
or
TCB DX Count
2DDMA
register.