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Link Port Communication Protocol
The DMA channel of any port not being used for boot must be cleared
and reinitialized. If the DMA channel is not deactivated, the link inter-
rupt mechanism does not work. The link may be reinitialized as well.
!
If both links that are connected to each other start transmitting at
the same time, unexpected results may occur (up to protocol dead-
lock). The system designer must initialize the system in such a way
that one of the links transmits first.
Link Port Communication Protocol
The link port communicates through an 8-bit data bus, using three con-
trol signals. There is a set of link pins for each link port. In the link pin
names, the "x" stands for the link port—0, 1, 2, or 3. The control signal
pins are:
•
LxCLKIN
when the link receives, and as an acknowledge when the link
transmits.
•
LxCLKOUT
when the link transmits, and as an acknowledge when the link
receives.
•
LxDAT7–0
The data is transmitted or received one byte every
Transfers are of quad-words. The transfer begins from byte 0.
•
– Link direction indication
LxDIR
The
LxDIR
or receiving. It is used when the links are buffered.
The link port protocol includes a Transfer Acknowledge and an optional
Connectivity Check for each quad-word transferred. Errors resulting from
these handshakes are described in "Error Detection Mechanisms" on
page 8-17.
8-8
– The
pin is an input that functions as a clock
LxCLKIN
– The
pin is an output that functions as a clock
LxCLKOUT
– Data bus input and output
pin is an output that indicates if the link is transmitting
ADSP-TS101 TigerSHARC Processor
Hardware Reference
edge.
LxCLK
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