Table 3-2 Interrupts Used By The Monitor Program - Analog Devices ADSP-21065L EZ-KIT Lite Manual

Evaluation system

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When writing code, these interrupts (and their corresponding vectors) should not be

altered. If these vectors are overwritten, the kernel may not work as shown in Table 3-1.

For more information on the registers that control interrupts, and a complete list of inter-

rupt vector addresses, see Appendix E and F in the ADSP-21065L SHARC Technical

Reference.

Interrupt

Description

IRQ0

Multiplexed from the UART through

an open collector device

SFT3

Used to signal the monitor to send

data back to the Host

SPT1

AD1819 Transmit Interrupt

SPR1

AD1819 Receive Interrupt

The following rules and restrictions should be followed when using interrupts:

•

You cannot step into an interrupt.

•

Interrupts are disabled when the user program is halted.

•

The board cannot communicate with the host if an interrupt higher than IRQ0 is

used.

•

The board cannot communicate with the host if interrupt nesting is disabled.

•

If the user does not require the supplied monitor program, IRQ0 with SW2 can be

configured by the user. In the initialization code of the user's program, the interrupt

vector for IRQ0 must be replaced. This removes all monitor functionality.

•

If the user does not connect an EMAFE to the EZ-KIT Lite, IRQ1 with SW4 can be

configured for other purposes. If an EMAFE card is attached and it uses IRQ1, there

is no way to disable the EMAFE's control of the interrupt line. If the EMAFE is not

attached, IRQ1 is available for other uses. Note: the monitor program does not

interact with the EMAFE board, and does not have any response to an IRQ1 request.

3.2.1.3 Serial Ports

The ADSP-21065L features two synchronous Serial Ports (SPORT0 and SPORT1). The

SPORTs can operate at up to 1x clock frequency, providing each with a maximum data

rate of 30 Mbit/sec. Each SPORT has a primary and a secondary set of transmit and

receive channels. SPORT data can be automatically transferred to and from on-chip

memory using DMA.

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