Handling Bms - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

If the pin is sampled high during reset, this causes the processor to go
BMS
into idle. When the processor is in the idle state waiting for a host or link
boot, any signal from the host or link causes a slave mode boot.

Handling BMS

Master Mode Boot
When booting from an EPROM or FLASH device, connect an external
pull-down resistor to
Slave Boot Mode
When booting from either the host or link port, connect an external
pull-up resistor to
select, if necessary as the pull-up resistor can easily be overridden. If
not used to access FLASH/EPROM in slave boot mode, it can alterna-
tively be tied to
the Engineer-to-Engineer Note EE-174: ADSP-TS101 Boot Loader Kernels
Operation.
General Boot Scenario
Regardless of which boot mode (master or slave) is used, each shares a
common boot process.
1. The
BMS
Each DMA channel from which the TigerSHARC processor can
boot is automatically configured for a 256-word (32-bit normal
word) transfer.
ADSP-TS101 TigerSHARC Processor
Hardware Reference
.
BMS
. In this case,
BMS
. For additional information on booting, refer to
VDD_IO
pin determines the booting method.
can still be used as a memory
BMS
System Design
is
BMS
10-19