Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual page 290

External Port DMA
Table 7-8. External Memory TCB
Receiver TCB Configuration
Register Field
DI
DX
DY
DP TY
DP PR
DP 2DDMA
DP LEN
DP INT
DP DRQ
DP CHEN
DP CHTG
DP CHPT
For more information, see "Flyby Transactions" on page 5-34.
7-56
Description
External memory address
Number of words to transfer and address modifier. The
to X dimension data when the
Number of Y dimension words to transfer and address modifier when the
bit is set in the
2DDMA DP
External memory
Channel priority
1 – Increases the channel priority – cluster bus transaction is signaled as a
Priority Access transaction.
Sets the two-dimensional DMA mode
1 – Enables two-dimensional DMA mode; the
relevant.
(See "Two-Dimensional DMA" on page 7-45.)
Must be the same as the value specified in the
register.
TCB DP
Sets interrupt
1 – Interrupts the core once the complete block is transferred.
Irrelevant when the
INT
Sets transfer mode
1 – Transfers each data item per request.
Irrelevant when the
DRQ
register.
Sets chaining mode
1 – Enables chaining
The setting must be identical to transmitter
Defines register to be loaded; must be the same channel.
TCB
Chaining pointer – relevant when chaining is enabled.
ADSP-TS101 TigerSHARC Processor
bit is set in the
2DDMA
register; otherwise irrelevant.
DY
LEN
bit is set in the transmitter's
bit is set in the transmitter's
TCB
Hardware Reference
register also refers
DX
register.
DP
register becomes
field of the transmitter's
register.
TCB DP
TCB DP
.