Link Port Receive And Transmit Buffers - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

Register Access Features

Link Port Receive and Transmit Buffers

Table 2-21. Link Port Receive and Transmit Buffers
Register Quads Links 0 - 3 Registers Direct Memory Address Remarks
LBUFTX0
LBUFRX0
LBUFTX1
LBUFRX1
LBUFTX2
LBUFRX2
LBUFTX3
LBUFRX3
2-48
Link # 0 Tx register 0x1804A0-3
Link # 0 Rx register 0x1804A4-7
Link # 1 Tx register 0x1804A8-B
Link # 1 Rx register 0x1804AC-F
Link # 2 Tx register 0x1804B0-3
Link # 2 Rx register 0x1804B4-7
Link # 3 Tx register 0x1804B8-B
Link # 3 Rx register 0x1804BC-F
-
Read only
Read only
–
Read only
–
Read only
ADSP-TS101 TigerSHARC Processor
Hardware Reference