Timers
set), writing 1 to
while the timer is operating changes the setup after the next expire of
INxx
the timer (when
Timer 0 Output Pin
Pin
indicates Timer 0 expire and issues a pulse on the timer out pin
TMR0E
for four
cycles.
SCLK
3-10
has no effect. Writing a different value to
TMRINxx
value is copied again to the timer).
TMRINxx
ADSP-TS101 TigerSHARC Processor
Hardware Reference
TMR-
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