7 DIRECT MEMORY ACCESS
Direct Memory Access (DMA) is a mechanism for transferring data with-
out executing instructions in the processor core. The TigerSHARC
processor on-chip DMA controller relieves the processor core of the bur-
den of moving data between internal memory and an external
device/memory, or between link ports and internal or external memory.
The fully integrated DMA controller allows the TigerSHARC core proces-
sor, or an external device, to specify data transfer operations and return to
normal processing while the DMA controller carries out the data transfers
in the background.
The TigerSHARC processor DMA competes with other internal bus mas-
ters for internal memory access. For more information, see "Processor
Microarchitecture" on page 5-3. This conflict is minimized because large
internal memory bus bandwidth is available.
The TigerSHARC processor DMA includes 14 DMA channels of which
four are dedicated to the transfer of data to and from external memory
devices (including other TigerSHARC processors in the cluster), eight to
the link ports and two to the AutoDMA registers. These DMA channels
allow for the following transfer types (the <–> symbol indicates "to and
from")
• Internal memory <–> External memory or memory-mapped
peripherals
• Internal memory <–> Internal memory of another TigerSHARC
processor via the cluster bus
• Internal memory <–> Host processor
ADSP-TS101 TigerSHARC Processor
Hardware Reference
7-1
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