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Number
7.1.3.6
Debug Exceptions (0x01C00Ð0x01F00)....................................................7-15
7.1.4
Implementing the Precise Exception Model ..................................................7-16
7.1.5
Recoverability after an Exception..................................................................7-17
7.1.6
Exception Latency..........................................................................................7-18
7.1.7
Partially Completed Instructions....................................................................7-19
8.1
Instruction Cache Organization............................................................................8-2
8.2
Data Cache Organization .....................................................................................8-5
8.3
Cache Control Registers.......................................................................................8-6
8.3.1
Instruction Cache Control Registers ................................................................8-6
8.3.1.1
Reading Data and Tags within the Instruction Cache..................................8-8
8.3.1.2
IC_CST Commands .....................................................................................8-9
8.3.1.2.1
8.3.1.2.2
8.3.1.2.3
8.3.1.2.4
8.3.1.2.5
8.3.2
Data Cache Control Registers ........................................................................8-11
8.3.2.1
Reading Data Cache Tags and Copyback Buffer.......................................8-14
8.3.2.2
DC_CST Commands..................................................................................8-15
8.3.2.2.1
8.3.2.2.2
8.3.2.2.3
8.3.2.2.4
8.3.2.2.5
8.3.2.2.6
8.4
PowerPC Cache Control Instructions.................................................................8-18
8.4.1
Instruction Cache Block Invalidate (icbi) ......................................................8-18
8.4.2
Data Cache Block Touch (dcbt) and Data Cache Block Touch
for Store (dcbtst) .......................................................................................8-18
8.4.3
Data Cache Block Zero (dcbz) ......................................................................8-19
8.4.4
Data Cache Block Store (dcbst) ....................................................................8-19
8.4.5
Data Cache Block Flush (dcbf)......................................................................8-20
8.4.6
Data Cache Block Invalidate (dcbi)...............................................................8-20
8.5
Instruction Cache Operations .............................................................................8-20
8.5.1
Instruction Cache Hit .....................................................................................8-22
8.5.2
Instruction Cache Miss...................................................................................8-22
8.5.3
Instruction Fetching on a Predicted Path .......................................................8-23
8.5.4
Fetching Instructions from Caching-Inhibited Regions.................................8-23
MOTOROLA
CONTENTS
Chapter 8
Instruction and Data Caches
Instruction Cache Enable/Disable Commands.........................................8-9
Instruction Cache Load & Lock Cache Block Command......................8-10
Instruction Cache Unlock Cache Block Command ...............................8-11
Instruction Cache Unlock All Command...............................................8-11
Instruction Cache Invalidate All Command...........................................8-11
Data Cache Enable/Disable Commands ................................................8-16
Data Cache Load & Lock Cache Block Command ...............................8-16
Data Cache Unlock Cache Block Command .........................................8-17
Data Cache Unlock All Command ........................................................8-17
Data Cache Invalidate All Command ....................................................8-17
Data Cache Flush Cache Block Command ............................................8-17
Title
Contents
Page
Number
ix
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