Motorola MPC860 PowerQUICC User Manual page 7

Paragraph
Number
5.1.3.1 Accessing SPRs..........................................................................................5-11
5.2 Register Initialization at Reset ...........................................................................5-11
6.1 Operand Conventions...........................................................................................6-1
6.1.1 Data Organization in Memory and Data Transfers ..........................................6-1
6.1.2 Aligned and Misaligned Accesses ...................................................................6-1
6.2 Instruction Set Summary......................................................................................6-2
6.2.1 Classes of Instructions......................................................................................6-3
6.2.1.1 Definition of Boundedly Undefined ............................................................6-4
6.2.1.2 Defined Instruction Class.............................................................................6-4
6.2.1.3 Illegal Instruction Class ...............................................................................6-4
6.2.1.4 Reserved Instruction Class...........................................................................6-5
6.2.2 Addressing Modes............................................................................................6-5
6.2.2.1 Memory Addressing.....................................................................................6-5
6.2.2.2 Effective Address Calculation .....................................................................6-6
6.2.2.3 Synchronization ...........................................................................................6-6
6.2.2.3.1
6.2.2.3.2
6.2.2.3.3
6.2.3 Instruction Set Overview..................................................................................6-7
6.2.4 PowerPC UISA Instructions ............................................................................6-8
6.2.4.1 Integer Instructions ......................................................................................6-8
6.2.4.1.1
6.2.4.1.2
6.2.4.1.3
6.2.4.1.4
6.2.4.2 Load and Store Instructions .......................................................................6-11
6.2.4.2.1
6.2.4.2.2
6.2.4.2.3
6.2.4.2.4
6.2.4.2.5
6.2.4.2.6
6.2.4.3 Branch and Flow Control Instructions .......................................................6-15
6.2.4.3.1
6.2.4.3.2
6.2.4.3.3
6.2.4.4 Trap Instructions ........................................................................................6-17
6.2.4.5 Processor Control Instructions ...................................................................6-17
MOTOROLA
CONTENTS
Chapter 6
MPC860 Instruction Set
Context Synchronization..........................................................................6-6
Execution Synchronization ......................................................................6-7
Instruction-Related Exceptions ................................................................6-7
Integer Arithmetic Instructions ................................................................6-8
Integer Compare Instructions...................................................................6-9
Integer Logical Instructions ...................................................................6-10
Integer Rotate and Shift Instructions .....................................................6-10
Integer Load and Store Address Generation ..........................................6-11
Register Indirect Integer Load Instructions ...........................................6-12
Integer Store Instructions .......................................................................6-13
Integer Load and Store with Byte-Reverse Instructions ........................6-13
Integer Load and Store Multiple Instructions ........................................6-14
Integer Load and Store String Instructions ............................................6-14
Branch Instruction Address Calculation ................................................6-15
Branch Instructions ................................................................................6-16
Condition Register Logical Instructions ................................................6-16
Title
Contents
Page
Number
vii