Μdma Channel Control Structure; Dma Channel Source Address End Pointer (Dmasrcendp), Offset 0X000; Dma Channel Destination Address End Pointer (Dmadstendp), Offset 0X004; Dma Channel Source Address End Pointer (Dmasrcendp) Register - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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16.6 µDMA Channel Control Structure

The µDMA Channel Control Structure holds the transfer settings for a µDMA channel. Each channel has

two control structures, which are located in a table in system memory. Refer to

explanation of the channel control table and the channel control structure.

The channel control structure is one entry in the channel control table. Each channel has a primary and

alternate structure. The primary control structures are located at offsets 0x0, 0x10, 0x20 and so on. The

alternate control structures are located at offsets 0x200, 0x210, 0x220, and so on.

DMA Channel Source Address End Pointer (DMASRCENDP) is part of the Channel Control Structure and

is used to specify the source address for a µDMA transfer.

The µDMA controller can transfer data to and from the on-chip SRAM. However, because the Flash

memory and ROM are located on a separate internal bus, it is not possible to transfer data from the Flash

memory or ROM with the µDMA controller.

NOTE: The offset specified is from the base address of the control structure in system memory, not

the µDMA module base address.

Figure 16-7. DMA Channel Source Address End Pointer (DMASRCENDP) Register

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 16-14. DMA Channel Source Address End Pointer (DMASRCENDP) Register Field

DMA Channel Destination Address End Pointer (DMADSTENDP) is part of the Channel Control Structure

and is used to specify the destination address for a µDMA transfer.

The offset specified is from the base address of the control structure in system memory, not the µDMA

module base address.

Figure 16-8. DMA Channel Destination Address End Pointer (DMADSTENDP) Register

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

SPRUH22I – April 2012 – Revised November 2019

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Source Address End Pointer

This field points to the last address of the µDMA transfer source (inclusive). If the source address is

not incrementing (the SRCINC field in the DMACHCTL register is 0x3), then this field points at the

source location itself (such as a peripheral data register).

Descriptions

M3 Micro Direct Memory Access ( µDMA)

µDMA Channel Control Structure

Section 16.3.5

Chapters

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