Dma Primecell Identification 2 (Dmapcellid2), Offset 0Xff8; Dma Primecell Identification 3 (Dmapcellid3), Offset 0Xffc; Dma Primecell Identification 2 (Dmapcellid2) Register; Dma Primecell Identification 3 (Dmapcellid3) Register - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Table 16-44. DMA PrimeCell Identification 1 (DMAPCellID1) Register Field Descriptions
Bit Field
31-8 Reserved
7-0 CID1

16.7.30 DMA PrimeCell Identification 2 (DMAPCellID2), offset 0xFF8

The DMAPCellIDn registers are hard-coded, and the fields within the registers determine the reset values.
Figure 16-39. DMA PrimeCell Identification 2 (DMAPCellID2) Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 16-45. DMA PrimeCell Identification 2 (DMAPCellID2) Register Field Descriptions
Bit Field
31-8 Reserved
7-0 CID2

16.7.31 DMA PrimeCell Identification 3 (DMAPCellID3), offset 0xFFC

The DMAPCellIDn registers are hard-coded, and the fields within the registers determine the reset values.
Figure 16-40. DMA PrimeCell Identification 3 (DMAPCellID3) Register
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 16-46. DMA PrimeCell Identification 3 (DMAPCellID3) Register Field Descriptions
Bit Field
31-8 Reserved
7-0 CID3
SPRUH22I – April 2012 – Revised November 2019
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Value Description
Reserved
µDMA PrimeCell ID Register [15:8]
Provides software a standard cross-peripheral identification system.
Reserved
R-0
Value Description
Reserved
µDMA PrimeCell ID Register [23:16]
Provides software a standard cross-peripheral identification system.
Reserved
R-0
Value Description
Reserved
µDMA PrimeCell ID Register [31:24]
Provides software a standard cross-peripheral identification system.
Copyright © 2012–2019, Texas Instruments Incorporated
µDMA Register Descriptions
8 7
CID2
R-05
8 7
CID3
R-B1
M3 Micro Direct Memory Access ( µDMA)
0
0
1189