Digital Compare A Control Register (Dcactl); Digital Compare A Control Register (Dcactl) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Table of Contents

Advertisement

Registers
Table 7-67. Digital Compare Trip Select (DCTRIPSEL) Field Descriptions (continued)
Bit
Field
3-0
DCAHCOMPSEL
15
7
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 7-68. Digital Compare A Control Register (DCACTL) Field Descriptions
Bit
Field
15-10
Reserved
9
EVT2FRC SYNCSEL
8
EVT2SRCSEL
7-4
Reserved
3
EVT1SYNCE
2
EVT1SOCE
1
EVT1FRC SYNCSEL
0
EVT1SRCSEL
768
C28 Enhanced Pulse Width Modulator (ePWM) Module
Value
Description
Digital Compare A High Input Select Bits
0000
TRIPIN1 and (TZ1 input)
0001
TRIPIN2 and (TZ2 input)
0010
TRIPIN3 and (TZ3 input)
0011
TRIPIN4
. . .
. . .
1011
TRIPIN12
1100
Reserved
1101
TRIPIN14
1110
TRIPIN15
1111
Trip combination input (all trip inputs selected by DCAHTRIPSEL register ORed
together)
Figure 7-118. Digital Compare A Control Register (DCACTL)
Reserved
R-0
4
R-0
Value
Description
Reserved
DCAEVT2 Force Synchronization Signal Select
0
Source Is Synchronous Signal
1
Source Is Asynchronous Signal
DCAEVT2 Source Signal Select
0
Source Is DCAEVT2 Signal
1
Source Is DCEVTFILT Signal
Reserved
DCAEVT1 SYNC, Enable/Disable
0
SYNC Generation Disabled
1
SYNC Generation Enabled
DCAEVT1 SOC, Enable/Disable
0
SOC Generation Disabled
1
SOC Generation Enabled
DCAEVT1 Force Synchronization Signal Select
0
Source Is Synchronous Signal
1
Source Is Asynchronous Signal
DCAEVT1 Source Signal Select
0
Source Is DCAEVT1 Signal
1
Source Is DCEVTFILT Signal
Copyright © 2012–2019, Texas Instruments Incorporated
10
3
2
EVT1SYNCE
EVT1SOCE
R/W-0
R/W-0
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
9
8
EVT2FRC
EVT2SRCSEL
SYNCSEL
R/W-0
R/W-0
1
0
EVT1FRC
EVT1SRCSEL
SYNCSEL
R/W-0
R/W-0
Submit Documentation Feedback

Advertisement

Table of Contents
loading

Table of Contents