Interrupt 128-133 Active Bit (Active4) Register, Offset 0X310; Interrupt 96-127 Active Bit (Active3) Register; Interrupt 128-133 Active Bit (Active4) Register; Interrupt 96-127 Active Bit (Active3) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25-34. Interrupt 96-127 Active Bit (ACTIVE3) Register Field Descriptions
Bit Field
31-0 INT

25.5.25 Interrupt 128-133 Active Bit (ACTIVE4) Register, offset 0x310

The Interrupt 128-133 Active Bit (ACTIVE4) register indicates which interrupts are active. Bit 0
corresponds to Interrupt 128; bit 5 corresponds to Interrupt 133. See the Cortex-M3 Processor chapter for
interrupt assignments.
Note: This register can only be accessed from privileged mode.
Caution: Do not manually set or clear the bits in this register.
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25-35. Interrupt 128-133 Active Bit (ACTIVE4) Register Field Descriptions
Bit Field
31-6 Reserved
5-0 INT
SPRUH22I – April 2012 – Revised November 2019
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Figure 25-28. Interrupt 96-127 Active Bit (ACTIVE3) Register
Value Description
Interrupt Active
0 The corresponding interrupt is not active.
1 The corresponding interrupt is active, or active and pending.
Figure 25-29. Interrupt 128-133 Active Bit (ACTIVE4) Register
Reserved
R-0
Value Description
Reserved
Interrupt Active
0 The corresponding interrupt is not active.
1 The corresponding interrupt is active, or active and pending.
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INT
R/W-0
NVIC Register Descriptions
0
6 5 0
INT
R/W-0
1625
Cortex-M3 Peripherals