Usb Request Packet Count In Block Transfer Endpoint N Registers; (Usbrqpktcount[1]Usbrqpktcount[15]); Usb Request Packet Count In Block Transfer Endpoint N Registers (Usbrqpktcount[N]); Usb Request Packet Count In Block Transfer Endpoint N Registers (Usbrqpktcount[N]) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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18.5.44 USB Request Packet Count in Block Transfer Endpoint n Registers

The USB receive packet count in block transfer endpoint n 16-bit read/writer registers are used in Host

mode to specify the number of packets that are to be transferred in a block transfer of one or more bulk

packets to receive endpoint n. The USB controller uses the value recorded in this register to determine the

number of requests to issue where the AUTORQ bit in the USBRXCSRH[n] register has been set. For

more information about IN transactions as a host, see

Note: Multiple packets combined into a single bulk packet within the FIFO count as one packet.

For the specific offset for each register see

OTG A or Host

The USBRQPKTCOUNT[n] registers are shown in

Figure 18-55. USB Request Packet Count in Block Transfer Endpoint n Registers

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 18-60. USB Request Packet Count in Block Transfer Endpoint n Registers

SPRUH22I – April 2012 – Revised November 2019

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(USBRQPKTCOUNT[n])

(USBRQPKTCOUNT[n]) Field Descriptions

Block Transfer Packet Count sets the number of packets of the size defined by the MAXLOAD bit field

that are to be transferred in a block transfer.

Note: This is only used in Host mode when AUTORQ is set. The bit has no effect in Device mode or

when AUTORQ is not set.

Figure 18-55

and described in

M3 Universal Serial Bus (USB) Controller

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