Test Modes - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Operating Modes
23.2.2.1 Disabled Automatic Retransmission
According to the CAN Specification (see ISO11898, 6.3.3 Recovery Management), the CAN provides a
mechanism to automatically retransmit frames which have lost arbitration or have been disturbed by errors
during transmission. The frame transmission service will not be confirmed to the user before the
transmission is successfully completed.
By default, this automatic retransmission is enabled. It can be disabled by setting the DAR bit in the CAN
Control register. Further details to this mode are provided in
23.2.2.2 Auto-Bus-On
By default, after the CAN has entered bus-off state, the CPU can start a bus-off-recovery sequence by
resetting Init bit. If this is not done, the module will stay in bus-off state.
The CAN provides an automatic auto-bus-on feature which is enabled by the ABO bit in
set, the CAN will automatically start the bus-off-recovery sequence. The sequence can be delayed by a
user-defined number of clock cycles which can be defined in
NOTE: If the CAN module goes Bus-Off due to massive occurrence of CAN bus errors, it stops all
bus activities and automatically sets the Init bit. Once the Init bit is cleared by the application
(or due to the auto-bus-on feature), the device will wait for 128 occurrences of Bus Idle
(equal to 128 * 11 consecutive recessive bits) before resuming normal operation. The Bus-
Off recovery sequence cannot be shortened by setting or resetting Init bit. At the end of the
bus-off recovery sequence, the error counters will be reset. After the Init bit is reset, each
time when a sequence of 11 recessive bits is monitored, a Bit0 Error code is written to the
Error and Status Register, enabling the CPU to check whether the CAN bus is stuck at
dominant or continuously disturbed, and to monitor the proceeding of the Bus-Off recovery
sequence.

23.2.3 Test Modes

The CAN module provides several test modes which are mainly intended for self-test purposes. The
muxing diagram below aids in understanding the various test modes. This block diagram should be
viewed as representative of the module behavior, and not as a gate-accurate implementation of the
module. For the sake of brevity, this diagram does not include the GPIO muxing or the I/O buffers.
1516
M3 Controller Area Network (CAN)
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Section 23.11.3.
Section 23.15.8.
SPRUH22I – April 2012 – Revised November 2019
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Section 23.15.1. If