System Handler Priority 1 (Syspri1) Register; System Handler Priority 1 (Syspri1) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

System Control Block (SCB) Register Descriptions
25.6.8 System Handler Priority 1 (SYSPRI1) Register, offset 0xD18
The SYSPRI1 register configures the priority level, 0 to 7 of the usage fault, bus fault, and memory
management fault exception handlers. This register is byte-accessible.
Note: This register can only be accessed from privileged mode.
31
Reserved
15 13 12
BUS
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25-46. System Handler Priority 1 (SYSPRI1) Register Field Descriptions
Bit Field
31-24 Reserved
23-21 USAGE
20-16 Reserved
15-13 BUS
12-8 Reserved
7-5 MEM
4-0 Reserved
1638
Cortex-M3 Peripherals
Figure 25-39. System Handler Priority 1 (SYSPRI1) Register
R-0
Reserved
R-0
Value Description
Reserved
Usage Fault Priority
This field configures the priority level of the usage fault. Configurable priority values are in the range
0-7, with lower values having higher priority.
Reserved
Bus Fault Priority
This field configures the priority level of the bus fault. Configurable priority values are in the range
0-7, with lower values having higher priority.
Reserved
Memory Management Fault Priority
This field configures the priority level of the memory management fault. Configurable priority values
are in the range 0-7, with lower values having higher priority.
Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
24 23 21
USAGE
R/W-0
8 7 5
MEM
R/W-0
SPRUH22I – April 2012 – Revised November 2019
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20
Reserved
R-0
4
Reserved
R-0
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16
0