Usb Transmit Interrupt Enable Register (Usbtxie), Offset 0X006; Usb Transmit Interrupt Status Enable Register (Usbtxie); Usb Transmit Interrupt Status Register (Usbtxie) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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18.5.5 USB Transmit Interrupt Enable Register (USBTXIE), offset 0x006

The USB transmit interrupt enable 16-bit register (USBTXIE) provides interrupt enable bits for the
interrupts in the USBTXIS register. When a bit is set, the USB interrupt is asserted to the interrupt
controller when the corresponding interrupt bit in the USBTXIS register is set. When a bit is cleared, the
interrupt in the USBTXIS register is still set but the USB interrupt to the interrupt controller is not asserted.
On reset, all interrupts are enabled.
Mode(s): OTG A or Host
USBTXIS is shown in
Figure 18-7. USB Transmit Interrupt Status Enable Register (USBTXIE)
15 14 13 12
EP15 EP14 EP13 EP12
R/W-1 R/W-1 R/W-1 R/W-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-10. USB Transmit Interrupt Status Register (USBTXIE) Field Descriptions
Bit Field
15 EP15
14 EP14
13 EP13
12 EP12
11 EP11
10 EP10
9 EP9
8 EP8
7 EP7
6 EP6
SPRUH22I – April 2012 – Revised November 2019
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OTG B or Device
Figure 18-7 and described in
11 10 9
EP11 EP10 EP9
R/W-1 R/W-1 R/W-1 R/W-1
Value Description
TX Endpoint 15 Interrupt Enable
0 The EP15 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP15 bit in the USBTXIS register is set.
TX Endpoint 14 Interrupt Enable
0 The EP14 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP14 bit in the USBTXIS register is set.
TX Endpoint 13 Interrupt Enable
0 The EP13 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP13 bit in the USBTXIS register is set.
TX Endpoint 12 Interrupt Enable
0 The EP12 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP12 bit in the USBTXIS register is set.
TX Endpoint 11 Interrupt Enable
0 The EP11 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP11 bit in the USBTXIS register is set.
TX Endpoint 10 Interrupt Enable
0 The EP10 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP10 bit in the USBTXIS register is set.
TX Endpoint 9 Interrupt Enable
0 The EP9 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP9 bit in the USBTXIS register is set.
TX Endpoint 8 Interrupt Enable
0 The EP8 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP8 bit in the USBTXIS register is set.
TX Endpoint 7 Interrupt Enable
0 The EP7 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP7 bit in the USBTXIS register is set.
TX Endpoint 6 Interrupt Enable
0 The EP6 transmit interrupt is suppressed and not sent to the interrupt controller.
1 An interrupt is sent to the interrupt controller when the EP6 bit in the USBTXIS register is set.
Copyright © 2012–2019, Texas Instruments Incorporated
Table 18-10.
8 7 6 5
EP8 EP7 EP6 EP5
R/W-1 R/W-1 R/W-1
M3 Universal Serial Bus (USB) Controller
Register Descriptions
4 3 2 1
EP4 EP3 EP2 EP1
R/W-1 R/W-1 R/W-1 R/W-1
0
EP0
R/W-1
1307