Systick Reload Value Register (Streload), Offset 0X014; Systick Current Value Register (Stcurrent), Offset 0X018; Systick Reload Value Register (Streload); Systick Current Value Register (Stcurrent) - Texas Instruments Concerto F28M35 Series Technical Reference Manual

System Timer (SysTick) Register Descriptions

25.4.2 SysTick Reload Value Register (STRELOAD), offset 0x014

The SysTick Reload Value Register (STRELOAD) register specifies the start value to load into the
SysTick Current Value (STCURRENT) register when the counter reaches 0. The start value can be
between 0x1 and 0x00FF.FFFF. A start value of 0 is possible but has no effect because the SysTick
interrupt and the COUNT bit are activated when counting from 1 to 0.
SysTick can be configured as a multi-shot timer, repeated over and over, firing every N+1 clock pulses,
where N is any value from 1 to 0x00FF.FFFF. For example, if a tick interrupt is required every 100 clock
pulses, 99 must be written into the RELOAD field.
Note: This register can only be accessed from privileged mode.
31
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25-9. SysTick Reload Value Register (STRELOAD) Field Descriptions
Bit Field
31-24 Reserved
23-0 RELOAD

25.4.3 SysTick Current Value Register (STCURRENT), offset 0x018

The SysTick Current Value Register (STCURRENT) contains the current value of the SysTick counter.
Note: This register can only be accessed from privileged mode.
31
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25-10. SysTick Current Value Register (STCURRENT) Field Descriptions
Bit Field
31-24 Reserved
23-0 CURRRENT
1610
Cortex-M3 Peripherals
Figure 25-3. SysTick Reload Value Register (STRELOAD)
24 23
Value Description
Reserved
Reload Value
Value to load into the SysTick Current Value (STCURRENT) register when the counter reaches 0.
Figure 25-4. SysTick Current Value Register (STCURRENT)
24 23
Value Description
Reserved
Current Value
This field contains the current value at the time the register is accessed. No read-modify-write
protection is provided, so change with care. This register is write-clear. Writing to it with any value
clears the register. Clearing this register also clears the COUNT bit of the STCTRL register
Copyright © 2012–2019, Texas Instruments Incorporated
RELOAD
R/W-0
RELOAD
R/WC-0
SPRUH22I – April 2012 – Revised November 2019
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