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General-Purpose Mode
17.8.1.1 FRAME Signal Operation
The operation of the FRAME signal is controlled by the FRMCNT and FRM50 bits. When FRM50 is clear,
the FRAME signal is high whenever the WR or RD strobe is high. When FRMCNT is clear, the FRAME
signal is simply the logical OR of the WR and RD strobes, so the FRAME signal is high during every read
or write access. See
Figure 17-18. FRAME Signal Operation, FRM50 = 0 and FRMCNT = 0
Clock
(
)
EPI0S31
WR
(
)
EPI0S28
RD
(
)
EPI0S29
Frame
(
)
EPI0S30
If the FRMCNT field is 0x1, then the FRAME signal pulses high during every other read or write access.
See
Figure
17-19.
Figure 17-19. FRAME Signal Operation, FRM50 = 0 and FRMCNT = 1
Clock
(
)
EPI0S31
WR
(
)
EPI0S28
RD
(
)
EPI0S29
Frame
(
)
EPI0S30
If the FRMCNT field is 0x2 and FRM50 is clear, then the FRAME signal pulses high during every third
access, and so on for every value of FRMCNT. See
Figure 17-20. FRAME Signal Operation, FRM50 = 0 and FRMCNT = 2
Clock
(
)
EPI0S31
WR
(
)
EPI0S28
RD
(
)
EPI0S29
Frame
(
)
EPI0S30
When FRM50 is set, the FRAME signal transitions on the rising edge of either the WR or RD strobes.
When FRMCNT=0, the FRAME signal transitions on the rising edge of WR or RD for every access. See
Figure
17-21.
1220
External Peripheral Interface (EPI)
Figure
17-18.
Copyright © 2012–2019, Texas Instruments Incorporated
Figure
17-20.
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
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