By Half Clock Cycle. Inactive Level Is Low.) - Texas Instruments Concerto F28M35 Series Technical Reference Manual

SPI Registers and Waveforms
Figure 12-26. CLOCK POLARITY = 0, CLOCK PHASE = 1 (All data transitions are during the rising edge,
974
C28 Serial Peripheral Interface (SPI)
but delayed by half clock cycle. Inactive level is low.)
Copyright © 2012–2019, Texas Instruments Incorporated
Ch1 Period
200 ns
SPICLK
SPISIMO
SPRUH22I – April 2012 – Revised November 2019
Submit Documentation Feedback
www.ti.com