Epi Host-Bus 16 Signal Connections - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Host Bus Mode
EPI Signal {CSCFGEXT,CSCF
EPI0S0
EPI0S1
EPI0S2
EPI0S3
EPI0S4
EPI0S5
EPI0S6
EPI0S7
EPI0S8
EPI0S9
EPI0S10
EPI0S11
EPI0S12
EPI0S13
EPI0S14
EPI0S15
EPI0S16
EPI0S17
EPI0S18
EPI0S19
EPI0S20
EPI0S21
EPI0S22
EPI0S23
EPI0S24
EPI0S25
(1)
"X" indicates the state of this field is a don't care.
(2)
When an entry straddles several row, the signal configuration is the same for all rows.
(3)
In this mode, halfword accesses are used. A0 is the LSB of the address and is equivalent to the internal Cortex-M3 A1 address.
This pin should be connected to A0 of 16-bit memories.
1206
External Peripheral Interface (EPI)
Table 17-7. EPI Host-Bus 16 Signal Connections
BSEL
G}
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
X X
0x0,0x1,0x2 0
1
0x3 0
1
0x4,0x5 0
1
0x6 0
1
0x7 0
1
0x0, 0x1 X
0x2 0
1
0x3 0
1
0x4 0
1
0x5 0
1
Copyright © 2012–2019, Texas Instruments Incorporated
(1) (2)
HB16 Signal HB16 Signal
(3)
(MODE=ADMUX) (MODE-
ADNOMUX)
AD0 D0
AD1 D1
AD2 D2
AD3 D3
AD4 D4
AD5 D5
AD6 D6
AD7 D7
AD8 D8
AD9 D9
AD10 D10
AD11 D11
AD12 D12
AD13 D13
AD14 D14
AD15 D15
A16 A0
A17 A1
A18 A2
A19 A3
A20 A4
A21 A5
A22 A6
A23 A7
A24 A8
BSEL0 BSEL0
A24 A8
BSEL0 BSEL0
- A8
A25 A9
A25 A9
BSEL0 BSEL0
A25 A9
BSEL1 BSEL1
A25 A9
BSEL0 BSEL0
A25 A9
BSEL0 BSEL0
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
B16 Signal
MODE=XFIFO)
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
(3)
-
-
-
-
-
-
-
-
-
-
CS1
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