Trigxsel Trigger Options - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Analog-to-Digital Converter (ADC)
When configured as such, four conversions of ADCINA1 will be started in series on an ePWM3 SOCA
event with the resulting values stored in the ADCRESULT0 – ADCRESULT3 registers.
Another application may require 3 different signals to be sampled from the same trigger. This can be done
by simply changing the CHSEL field for SOC0-SOC2 while leaving the TRIGSEL field and TRIG1SEL
register unchanged.
ADCSOC0CTL = 2846h;
ADCSOC1CTL = 2886h;
ADCSOC2CTL = 28C6h;
TRIG1SEL = 000Bh
When configured this way, three conversions will be started in series on an ePWM3 SOCA event. The
result of the conversion on channel ADCINA1 will show up in ADCRESULT0. The result of the conversion
on channel ADCINA2 will show up in ADCRESULT1. The result of the conversion on channel ADCINA3
will show up in ADCRESULT2. The channel converted and the trigger have no bearing on where the result
of the conversion shows up. The RESULT register is associated with the SOC.
NOTE: These examples are incomplete. Clocks must be enabled and the ADC must be powered to
work correctly. See
clocks. For the power up sequence of the ADC, see
Table 10-2
shows the configuration options for the TRIGxSEL registers.
TRIGxSEL Bits
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
862
Analog Subsystem
Section 10.5
for more details on how to configure Analog Subsystem
Table 10-2. TRIGxSEL Trigger Options
Trigger Source
No Trigger Enabled (Default)
TINT0
TINT1
TINT2
ADCEXTTRIG
EPWM1SOCA
EPWM1SOCB
EPWM1SYNC
EPWM2SOCA
EPWM2SOCB
EPWM2SYNC
EPWM3SOCA
EPWM3SOCB
EPWM3SYNC
EPWM4SOCA
EPWM4SOCB
EPWM4SYNC
EPWM5SOCA
EPWM5SOCB
EPWM5SYNC
EPWM6SOCA
EPWM6SOCB
EPWM6SYNC
EPWM7SOCA
EPWM7SOCB
EPWM7SYNC
Copyright © 2012–2019, Texas Instruments Incorporated
// (ACQPS=6, CHSEL=1, TRIGSEL=5)
// (ACQPS=6, CHSEL=2, TRIGSEL=5)
// (ACQPS=6, CHSEL=3, TRIGSEL=5)
// (TRIG1SEL=11)
Section
10.3.8.
C28 GPIO MUX
SPRUH22I – April 2012 – Revised November 2019
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Peripheral
CPU Timer 0
CPU Timer 1
CPU Timer 2
EPWM1
EPWM2
EPWM3
EPWM4
EPWM5
EPWM6
EPWM7

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