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3.8
Data Rate Programming
The data rate used when transmitting, or the data rate expected in receive is programmed by the
MDMCFG3.DRATE_M and the MDMCFG4.DRATE_E configuration registers. The data rate is given by
the formula below. As the formula shows, the programmed data rate depends on the crystal frequency.
The following approach can be used to find suitable values for a given data rate:
ê
æ
R
ç
ê
DATA
=
DRATE_E
log
2
ç
ê
f
è
XOSC
ë
R
DATA
=
DRATE_M
DRATE_E
´
f
2
XOSC
If DRATE_M is rounded to the nearest integer and becomes 256, increment DRATE_E and use
DRATE_M = 0.
The data rate can be set from 1.2 kBaud to 500 kBaud with the minimum step size shown in
3.9
Receiver Channel Filter Bandwidth
To meet different channel width requirements, the receiver channel filter is programmable. The
MDMCFG4.CHANBW_E and MDMCFG4.CHANBW_M configuration registers control the receiver channel
filter bandwidth, which scales with the crystal oscillator frequency.
the register settings and the channel filter bandwidth:
BW
=
channel
8 × (4 + CHANBW_M) × 2
The CC11x1-Q1 supports the channel filter bandwidths shown in
Copyright © 2009–2010, Texas Instruments Incorporated
ú
ö
20
´
2
÷
ú
÷
ú
ø
û
28
´
2
-
256
Table 3-5. Data Rate Step Size
DATA RATE (kBaud)
MINIMUM
TYPICAL
0.8
1.2 / 2.4
3.17
4.8
6.35
9.6
12.7
19.6
25.4
38.4
50.8
76.8
101.6
153.6
203.1
250
f
XOSC
CHANBW_E
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SWRS076B – 11-07-22-013 - APRIL 2009 – REVISED APRIL 2010
DATA RATE
STEP SIZE
MAXIMUM
(kBaud)
3.17
0.0062
6.35
0.0124
12.7
0.0248
25.4
0.0496
50.8
0.0992
101.6
0.1984
203.1
0.3967
406.3
0.7935
Equation 3
Table
3-6.
CC11x1-Q1
(1)
(2)
Table
3-5.
gives the relation between
(3)
Detailed Description
29
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