Spi Operation Using The Clock Stop Mode; Spi Protocol; Activity On Mcbsp Pins For The Possible Values Of Xmcm - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Figure 15-35. Activity on McBSP Pins for the Possible Values of XMCM
(a) XMCM = 00b: All channels enabled and unmasked
Internal FSX
(b) XMCM = 01b, XPABLK = 00b, XCERA = 1010b: Only channels 1 and 3 enabled and unmasked
Internal FSX
(c) XMCM = 10b, XPABLK = 00b, XCERA = 1010b: All channels enabled, only 1 and 3 unmasked
Internal FSX
(d) XMCM = 11b, RPABLK = 00b, XPABLK = X, RCERA = 1010b, XCERA = 1000b:
Receive channels: 1 and 3 enabled; transmit channels: 1 and 3 enabled, but only 3 unmasked
Internal FS(R/X)
DXR1 to XSR1 copy (W1)

15.7 SPI Operation Using the Clock Stop Mode

This section explains how to use the McBSP in SPI mode.

15.7.1 SPI Protocol

The SPI protocol is a master-slave configuration with one master device and one or more slave devices.
The interface consists of the following four signals:
• Serial data input (also referred to as slave out/master in, or SOMI)
SPRUH22I – April 2012 – Revised November 2019
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W0
DX
XRDY
Write to DXR1(W1)
DXR1 to XSR1 copy(W0)
DXR1 to XSR1 copy(W1)
DX
XRDY
DXR1 to XSR1 copy(W1)
DX
XRDY
Write to DXR1(W1)
DXR1 to XSR1 copy(W0)
DXR1 to XSR1 copy(W1)
DR
RRDY
Read From DRR1(W3)
RBR1 to DRR1 copy (W3)
DX
XRDY
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SPI Operation Using the Clock Stop Mode
W1 W2
Write to DXR1(W3)
DXR1 to XSR1 copy(W2)
DXR1 to XSR1 copy(W3)
Write to DXR1(W2)
W1
Write to DXR1(W3) DXR1 to XSR1 copy(W3)
W1
Write to DXR1(W3)
DXR1 to XSR1 copy(W2)
DXR1 to XSR1 copy(W3)
Write to DXR1(W2)
W1
RBR1 to DRR1 copy (W1)
Write to DXR1(W3) DXR1 to XSR1 copy (W3)
C28 Multichannel Buffered Serial Port (McBSP)
W3
W3
W3
W3
Read From DRR1(W1)
RBR1 to DRR1 (W3)
W3
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