Register, Address 0X05; Register; Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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19.7.6 Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page
Ability (MR5) Register, address 0x05
The Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability (MR5)
register provides the advertised abilities of the link partner's Ethernet PHY that are received and stored
during auto-negotiation.
Figure 19-26. Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page
15 14
NP ACK
R-0 R-0
7
A
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19-25. Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page
Bit Field
15 NP
14 ACK
13 RF
12-5 A
4-0 S
SPRUH22I – April 2012 – Revised November 2019
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Ability (MR5) Register
13 12
RF
R-0
5 4
Ability (MR5) Register Field Descriptions
Value Description
Next Page
0 The link partner's Ethernet PHY is not capable of Next Page exchanges.
1 The link partner's Ethernet PHY is capable of Next Page exchanges to provide more detailed
information on the PHY's capabilities.
Acknowledge
0 The Ethernet PHY has not received the link partner's advertised abilities during auto-negotiation.
1 The Ethernet PHY has successfully received the link partner's advertised abilities during auto-
negotiation.
Remote Fault
0 The link partner is not indicating that a Remote Fault condition has been encountered.
1 The link partner is indicating that a Remote Fault condition has been encountered.
ReservedTechnology Ability Field
This field encodes individual technologies that are supported by the Ethernet PHY. See the MR4
register for definitions. Refer to the IEEE 802.3 standard for definitions.
Selector Field
This field encodes possible messages for communicating between Ethernet PHYs.
00 Reserved
01 IEEE Std 802.3
02 IEEE Std 802.9 ISLAN-16T
03 IEEE Std 802.5
04 IEEE Std 1394
05-1F Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
MII Management Register Descriptions
9
A
R-0
S
R-1
M3 Ethernet Media Access Controller (EMAC)
8
0
1407