Ecap Interrupt Enable Register (Eceint); Ecap Interrupt Enable Register (Eceint) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Capture Module - Control and Status Registers
15
7
6
CTR=CMP
CTR=PRD
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8-9. ECAP Interrupt Enable Register (ECEINT) Field Descriptions
Bits
Field
15:8
Reserved
7
CTR=CMP
6
CTR=PRD
5
CTROVF
4
CEVT4
3
CEVT3
2
CEVT2
1
CEVT1
0
Reserved
The interrupt enable bits (CEVT1, ...) block any of the selected events from generating an interrupt.
Events will still be latched into the flag bit (ECFLG register) and can be forced/cleared via the
ECFRC/ECCLR registers.
The proper procedure for configuring peripheral modes and interrupts is as follows:
Disable global interrupts
Stop eCAP counter
Disable eCAP interrupts
Configure peripheral registers
Clear spurious eCAP interrupt flags
Enable eCAP interrupts
Start eCAP counter
Enable global interrupts
806
C28 Enhanced Capture (eCAP) Module
Figure 8-19. ECAP Interrupt Enable Register (ECEINT)
Reserved
5
4
CTROVF
CEVT4
R/W
R/W
Value
Description
Counter Equal Compare Interrupt Enable
0
Disable Compare Equal as an Interrupt source
1
Enable Compare Equal as an Interrupt source
Counter Equal Period Interrupt Enable
0
Disable Period Equal as an Interrupt source
1
Enable Period Equal as an Interrupt source
Counter Overflow Interrupt Enable
0
Disabled counter Overflow as an Interrupt source
1
Enable counter Overflow as an Interrupt source
Capture Event 4 Interrupt Enable
0
Disable Capture Event 4 as an Interrupt source
1
Capture Event 4 Interrupt Enable
Capture Event 3 Interrupt Enable
0
Disable Capture Event 3 as an Interrupt source
1
Enable Capture Event 3 as an Interrupt source
Capture Event 2 Interrupt Enable
0
Disable Capture Event 2 as an Interrupt source
1
Enable Capture Event 2 as an Interrupt source
Capture Event 1 Interrupt Enable
0
Disable Capture Event 1 as an Interrupt source
1
Enable Capture Event 1 as an Interrupt source
Copyright © 2012–2019, Texas Instruments Incorporated
3
2
CEVT3
CEVT2
R/W
R/W
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
8
1
0
CETV1
Reserved
R/W
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