Usb Receive Dynamic Fifo Sizing Register (Usbrxfifosz), Offset 0X063; Usb Receive Dynamic Fifo Sizing Register (Usbrxfifosz); Usb Receive Dynamic Fifo Sizing Register (Usbrxfifosz) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Register Descriptions

18.5.15 USB Receive Dynamic FIFO Sizing Register (USBRXFIFOSZ), offset 0x063

The USB receive dynamic FIFO sizing 8-bit register (USBRXFIFOSZ) allows the selected RX endpoint
FIFOs to be dynamically sized.
Mode(s): OTG A or Host
USBRXFIFOSZ is shown in
Figure 18-20. USB Receive Dynamic FIFO Sizing Register (USBRXFIFOSZ)
7
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-23. USB Receive Dynamic FIFO Sizing Register (USBRXFIFOSZ) Field Descriptions
Bit Field Value
7-5 Reserved 0
4 DPB
0
1
3-0 SZ
0h
1h
2h
3h
4h
5h
6h
7h
8h
9-Fh
1322
M3 Universal Serial Bus (USB) Controller
OTG B or Device
Figure 18-20 and described in
5 4
DPB
R/W-0
Description
Reserved
Double Packet Buffering Support
Single packet buffering is supported.
Double packet buffering is enabled.
Maximum packet size to be allowed. If DPB = 0, the FIFO also is this size; if DPB = 1, the FIFO is twice
this size. Packet size in bytes:
8
16
32
64
128
256
512
1024
2048
Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
Table 18-23.
3
SZ
R-0
SPRUH22I – April 2012 – Revised November 2019
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