Mpu Type (Mputype) Register; Mpu Type (Mputype) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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25.7 Memory Protection Unit (MPU) Register Descriptions
This section lists and describes the Memory Protection Unit (MPU) registers, in numerical order by
address offset.
Note: The MPU registers can only be accessed from privileged mode.
25.7.1 MPU Type (MPUTYPE) Register, offset 0xD90
The MPU Type (MPUTYPE) register indicates whether the MPU is present, and if so, how many regions it
supports.
Note: This register can only be accessed from privileged mode.
31
Reserved
15
DREGION
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-24 Reserved
23-16 IREGION
15-8 DREGION
7-1 Reserved
0 SEPARATE
SPRUH22I – April 2012 – Revised November 2019
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Figure 25-47. MPU Type (MPUTYPE) Register
R-0
R-0
Table 25-54. MPU Type (MPUTYPE) Register Field Descriptions
Value Description
Reserved
Number of I Regions
00h This field indicates the number of supported MPU instruction regions. This field always contains
0x00. The MPU memory map is unified and is described by the DREGION field.
Number of D Regions
0x08 Indicates there are eight supported MPU data regions.
Reserved
Separate or Unified MPU
0h Indicates the MPU is unified.
Copyright © 2012–2019, Texas Instruments Incorporated
Memory Protection Unit (MPU) Register Descriptions
24 23
8 7
Reserved
R-0
IREGION
R-0
1 0
SEPARATE
R-0
Cortex-M3 Peripherals
16
1649