Entering Sleep Modes; Wake Up From Sleep Mode - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Power Management
The SLEEPDEEP bit of the System Control (SYSCTRL) register selects which sleep mode is used (see
the Cortex-M3 Peripherals chapter). For more information about the behavior of the sleep modes, see the
System Control chapter.
This section describes the mechanisms for entering sleep mode and the conditions for waking up from
sleep mode, both of which apply to Sleep mode and Deep-sleep mode.

24.9.1 Entering Sleep Modes

This section describes the mechanisms software can use to put the processor into one of the sleep
modes.
The system can generate spurious wake-up events, for example a debug operation wakes up the
processor. Therefore, software must be able to put the processor back into sleep mode after such an
event. A program might have an idle loop to put the processor back to sleep mode.
24.9.1.1 Wait for Interrupt
The wait for interrupt instruction, WFI, causes immediate entry to sleep mode unless the wake-up
condition is true (see
instructions and enters sleep mode. See the Cortex-M3 Instruction Set Technical User's Manualfor more
information.
24.9.1.2 Wait for Event
The wait for event instruction, WFE, causes entry to sleep mode conditional on the value of a one-bit
event register. When the processor executes a WFE instruction, it checks the event register. If the register
is 0, the processor stops executing instructions and enters sleep mode. If the register is 1, the processor
clears the register and continues executing instructions without entering sleep mode.
If the event register is 1, the processor must not enter sleep mode on execution of a WFE instruction.
Typically, this situation occurs if an SEV instruction has been executed. Software cannot access this
register directly.
See the Cortex-M3 Instruction Set Technical User's Manual for more information.
24.9.1.3 Sleep-on-Exit
If the SLEEPEXIT bit of the SYSCTRL register is set, when the processor completes the execution of an
exception handler, it returns to Thread mode and immediately enters sleep mode. This mechanism can be
used in applications that only require the processor to run when an exception occurs.

24.9.2 Wake Up from Sleep Mode

The conditions for the processor to wake up depend on the mechanism that cause it to enter sleep mode.
24.9.2.1 Wake Up from WFI or Sleep-on-Exit
Normally, the processor wakes up only when it detects an exception with sufficient priority to cause
exception entry. Some embedded systems might have to execute system restore tasks after the processor
wakes up and before executing an interrupt handler. Entry to the interrupt handler can be delayed by
setting the PRIMASK bit and clearing the FAULTMASK bit. If an interrupt arrives that is enabled and has a
higher priority than current exception priority, the processor wakes up but does not execute the interrupt
handler until the processor clears PRIMASK.
24.9.2.2 Wake Up from WFE
The processor wakes up if it detects an exception with sufficient priority to cause exception entry.
In addition, if the SEVONPEND bit in the SYSCTRL register is set, any new pending interrupt triggers an
event and wakes up the processor, even if the interrupt is disabled or has insufficient priority to cause
exception entry. For more information about SYSCTRL, see the Cortex-M3 Peripherals chapter.
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Cortex-M3 Processor
Section 24.9.2.1). When the processor executes a WFI instruction, it stops executing
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SPRUH22I – April 2012 – Revised November 2019
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