Time-Stamp Counter Register (Tsctr); Counter Phase Control Register (Ctrphs); Capture-1 Register (Cap1); Capture-2 Register (Cap2) - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Capture Module - Control and Status Registers

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 8-1. Time-Stamp Counter Register (TSCTR) Field Descriptions

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 8-2. Counter Phase Control Register (CTRPHS) Field Descriptions

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

SPRUH22I – April 2012 – Revised November 2019

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Figure 8-11. Time-Stamp Counter Register (TSCTR)

Active 32-bit counter register that is used as the capture time-base

Figure 8-12. Counter Phase Control Register (CTRPHS)

Counter phase value register that can be programmed for phase lag/lead. This register shadows

TSCTR and is loaded into TSCTR upon either a SYNCI event or S/W force via a control bit. Used

to achieve phase control synchronization with respect to other eCAP and EPWM time-bases.

Figure 8-13. Capture-1 Register (CAP1)

Table 8-3. Capture-1 Register (CAP1) Field Descriptions

This register can be loaded (written) by :) Time-Stamp (counter value TSCTR) during a capture

event) Software - may be useful for test purposes / initialization) APRD shadow register (CAP3)

when used in APWM mode

Figure 8-14. Capture-2 Register (CAP2)

Table 8-4. Capture-2 Register (CAP2) Field Descriptions

This register can be loaded (written) by:

• Time-Stamp (counter value) during a capture event

• Software - may be useful for test purposes

• APRD shadow register (CAP4) when used in APWM mode

Capture Module - Control and Status Registers

C28 Enhanced Capture (eCAP) Module

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