Unexpected Receive Frame-Synchronization Pulse; Overrun Prevented In The Mcbsp Receiver; Possible Responses To Receive Frame-Synchronization Pulses - Texas Instruments Concerto F28M35 Series Technical Reference Manual

McBSP Exception/Error Conditions
CLKR
FSR
A1 A0
DR
RRDY
RFULL

15.5.3 Unexpected Receive Frame-Synchronization Pulse

Section 15.5.3.1 shows how the McBSP responds to any receive frame-synchronization pulses, including
an unexpected pulse.
error and an example of how to prevent such an error, respectively.

15.5.3.1 Possible Responses to Receive Frame-Synchronization Pulses

Figure 15-23 shows the decision tree that the receiver uses to handle all incoming frame-synchronization
pulses. The figure assumes that the receiver has been started (RRST = 1 in SPCR1). Case 3 in the figure
is the case in which an error occurs.
Figure 15-23. Possible Responses to Receive Frame-Synchronization Pulses
Any one of three cases can occur:
• Case 1: Unexpected internal FSR pulses with RFIG = 1 in RCR2. Receive frame-synchronization
pulses are ignored, and the reception continues.
• Case 2: Normal serial port reception. Reception continues normally because the frame-synchronization
1058
C28 Multichannel Buffered Serial Port (McBSP)
Figure 15-22. Overrun Prevented in the McBSP Receiver
B7 B6 B5 B4 B3 B2
RBR1 to DRR1 copy(A)
No read From DRR1(A)
Section 15.5.3.2 and Section 15.5.3.3
Receive frame-sync
pulse occurs.
Unexpected
frame-sync
pulse
?
Yes
RFIG=1
?
Yes
Case 1:
With frame ignore,
ignore frame pulse.
Receiver continues
running.
Copyright © 2012–2019, Texas Instruments Incorporated
B1 B0 C7 C6 C5
No RBR1 to DRR1 copy(B)
show an examples of a frame-synchronization
Case 2:
No
Normal reception.
Start receiving data.
Case 3:
Without frame ignore,
No abort reception.
Set RSYNCERR.
Start next reception
immediately.
Previous word is lost.
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
C4 C3 C2 C1 C0
RBR1 to DRR1(B)
Read from DRR1(A)
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