Timing Example For Simultaneous Mode / Early Interrupt Pulse - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Table of Contents

Figure 10-52. Timing Example For Simultaneous Mode / Early Interrupt Pulse

Analog Input A

Analog Input B

ADCCTL1.INTPULSEPOS

ADCSOCFLG 1.SOC0

ADCSOCFLG 1.SOC1

ADCSOCFLG 1.SOC2

S/H Window Pulse to Core

ADCINTFLG .ADCINTx

Result 0 (A) and Result 0 (B) latched on their respective cycles does not include the additional cycles required for the

C28x and M3 subsystems to read the ADC result registers using the ACIB.

Comparator Block

The comparator module described in this reference guide is a true analog voltage comparator in the

VDDA domain. The analog portion of the block include the comparator, its inputs and outputs, and the

internal DAC reference. The digital circuits, referred to as the wrapper in this document, include the DAC

controls, interface to other on-chip logic, output qualification block, and the control signals.

The comparator block can accommodate two external analog inputs or one external analog input using the

internal DAC reference for the other input. The output of the comparator can be passed asynchronously or

qualified and synchronized to the system clock period. The comparator output can be externally connected

to a GPIO in order to connect to an ePWM Trip Zone module.

SPRUH22I – April 2012 – Revised November 2019

Submit Documentation Feedback

Conversion 0 (A)

13 ADC Clocks

Result 0 (A) Latched

Conversion 0 (B)

13 ADC Clocks

Comparator Block

Result 0 (B) Latched

Conversion 1 (A)

13 ADC Clocks

Analog Subsystem

Chapters

Table of Contents