Mcbsp Pins/Signals; Mcbsp Interface Pins/Signals - Texas Instruments Concerto F28M35 Series Technical Reference Manual

Overview

15.1.2 McBSP Pins/Signals

Table 15-1 describes the McBSP interface pins and some internal signals.
McBSP-A Pin Type
MCLKRA I/O
MCLKXA I/O
MDRA
MDXA O
MFSRA I/O
MFSXA I/O
CPU Interrupt Signals
MRINT
MXINT
DMA Events
REVT
XEVT
1038
C28 Multichannel Buffered Serial Port (McBSP)
Table 15-1. McBSP Interface Pins/Signals
Description
Supplying or reflecting the receive clock; supplying the input clock of the sample rate generator
Supplying or reflecting the transmit clock; supplying the input clock of the sample rate generator
I Serial data receive pin
Serial data transmit pin
Supplying or reflecting the receive frame-sync signal; controlling sample rate generator synchronization
for the case when GSYNC = 1 (see
Supplying or reflecting the transmit frame-sync signal
Receive interrupt to CPU
Transmit interrupt to CPU
Receive synchronization event to DMA
Transmit synchronization event to DMA
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Section 15.4.3)
SPRUH22I – April 2012 – Revised November 2019
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