Soc Block Diagram - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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ADCSOC15CTL.ACQPS
ADCSOC2CTL.ACQPS
ADCSOC1CTL.ACQPS
ADCSOC0CTL.ACQPS
ADCSOC15CTL.CHSEL
ADCSOC2CTL.CHSEL
ADCSOC1CTL.CHSEL
ADCSOC0CTL.CHSEL
ADCSOCFLG1.SOC15
ADCSOCFLG1.SOC2
ADCSOCFLG1.SOC1
ADCSOCFLG1.SOC0
ADC Sample
Generation
Logic
For example, to configure a single conversion on channel ADCINA1 to occur when the ePWM3 timer
reaches its period match you must first setup ePWM3 to output an SOCA or SOCB signal on a period
match. See the Enhanced Pulse Width Modulator Module (EPWM) chapter on how to do this. For this
example, we'll use SOCA. Then, setup one of the SOCs using its ADCSOCxCTL register. It makes no
difference which SOC we choose, so we'll use SOC0. It also makes no difference which ADC trigger we
choose, so we'll use ADC trigger 1. The fastest allowable sample window for the ADC is 7 cycles.
Choosing the fastest time for the sample window and channel ADCINA1 for the channel to convert, we'll
set the ACQPS field to 6 and the CHSEL field to 1. To use ePWM3 for the SOC0 trigger, we'll set the
TRIGSEL field to 5 to choose ADC trigger 1 and the TRIG1SEL register to 11 to choose ePWM3 SOCA
as the trigger source. TRIGxSEL registers are located in the Analog System Control register set. The
resulting values written into the registers will be:
ADCSOC0CTL = 2846h;
TRIG1SEL = 000Bh
When configured as such, a single conversion of ADCINA1 will be started on an ePWM3 SOCA event with
the resulting value stored in the ADCRESULT0 register.
If instead ADCINA1 needed to be oversampled by 3X, then SOC1, SOC2, and SOC3 could all be given
the same configuration as SOC0.
ADCSOC1CTL = 2846h;
ADCSOC2CTL = 2846h;
ADCSOC3CTL = 2846h;
TRIG1SEL = 000Bh
SPRUH22I – April 2012 – Revised November 2019
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Figure 10-11. SOC Block Diagram
SOC15
SOC2
SOC1
SOC0
ADCSOC0CTL.ACQPS
ADCSOC0CTL.CHSEL
SOCOVF
Copyright © 2012–2019, Texas Instruments Incorporated
Analog-to-Digital Converter (ADC)
ADCSOC0CTL.TRIGSEL
0
1
2
8
Set
Latch
0
Start of SOC 0
Clear
1
2
3
ADCINTSOCSEL1.SOC0
// (ACQPS=6, CHSEL=1, TRIGSEL=5)
// (TRIG1SEL=11)
// (ACQPS=6, CHSEL=1, TRIGSEL=5)
// (ACQPS=6, CHSEL=1, TRIGSEL=5)
// (ACQPS=6, CHSEL=1, TRIGSEL=5)
// (TRIG1SEL=11)
ADCTRIG1
ADCTRIG2
ADCTRIG8
ADCSOCFRC 1.SOC0
ADCINT1
ADCINT2
undefined
861
Analog Subsystem