I2C Interrupt Enable Register (I2Cier); I2C Status Register (I2Cstr); I2C Interrupt Enable Register (I2Cier) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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14.5.3 I2C Interrupt Enable Register (I2CIER)

I2CIER is used by the CPU to individually enable or disable I2C interrupt requests. The bits of I2CIER are
shown and described in
15
7 6
Reserved AAS
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 14-9. I2C Interrupt Enable Register (I2CIER) Field Descriptions
Bit Field
15-7 Reserved
6 AAS
5 SCD
4 XRDY
3 RRDY
2 ARDY
1 NACK
0 AL

14.5.4 I2C Status Register (I2CSTR)

The I2C status register (I2CSTR) is a 16-bit register used to determine which interrupt has occurred and to
read status information. The bits of I2CSTR are shown and described in
respectively.
SPRUH22I – April 2012 – Revised November 2019
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Figure 14-18 and Table
Figure 14-18. I2C Interrupt Enable Register (I2CIER)
5 4
SCD XRDY
R/W-0 R/W-0
Value Description
These reserved bit locations are always read as zeros. A value written to this field has no effect.
Addressed as slave interrupt enable bit
0 Interrupt request disabled
1 Interrupt request enabled
Stop condition detected interrupt enable bit
0 Interrupt request disabled
1 Interrupt request enabled
Transmit-data-ready interrupt enable bit. This bit should not be set when using FIFO mode.
0 Interrupt request disabled
1 Interrupt request enabled
Receive-data-ready interrupt enable bit. This bit should not be set when using FIFO mode.
0 Interrupt request disabled
1 Interrupt request enabled
Register-access-ready interrupt enable bit
0 Interrupt request disabled
1 Interrupt request enabled
No-acknowledgment interrupt enable bit
0 Interrupt request disabled
1 Interrupt request enabled
Arbitration-lost interrupt enable bit
0 Interrupt request disabled
1 Interrupt request enabled
Copyright © 2012–2019, Texas Instruments Incorporated
14-9, respectively.
Reserved
R-0
3 2
RRDY ARDY
R/W-0 R/W-0
I2C Module Registers
1
NACK
R/W-0
Figure 14-19 and Table
C28 Inter-Integrated Circuit Module
8
0
AL
R/W-0
14-10,
1025