Usb Id Valid Detect Interrupt Status And Clear Register (Usbidvisc), Offset 0X44C; Usb Id Valid Detect Interrupt Status And Clear Register (Usbidvisc); Usb Id Valid Detect Interrupt Status And Clear Register (Usbidvisc) Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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18.5.61 USB ID Valid Detect Interrupt Status and Clear Register (USBIDVISC), offset 0x44C

The USB ID valid detect interrupt status and clear 32-bit register (USBIDVISC) specifies whether the
unmasked interrupt status of the ID value is valid.
Mode(s): OTG-specific functions
USBIDVISC is shown in
Figure 18-72. USB ID Valid Detect Interrupt Status and Clear Register (USBIDVISC)
31 8
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-77. USB ID Valid Detect Interrupt Status and Clear Register (USBIDVISC) Field
Bit Field Value
31-1 Reserved 0
0 VD
0
1
SPRUH22I – April 2012 – Revised November 2019
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Figure 18-72 and described in
Reserved
R-0
Descriptions
Description
Reserved. Reset is 0x0000.000.
ID Valid Detect Raw Interrupt Status
This bit is cleared by writing a 1. Clearing this bit also clears the ID bit in the USBIDVRIS register.
The ID bits in the USBIDVRIS and USBIDVIM registers are set, providing an interrupt to the interrupt
controller.
No interrupt has occurred or the interrupt is masked.
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Table 18-77.
M3 Universal Serial Bus (USB) Controller
Register Descriptions
0
ID
R/W1
C-0
1375