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ELECTRICAL DATA
(VDDINT= 1.0V± 0.05V, TA = -40 to 85°C, VDDM0 = 1.8V ± 0.15V)
OneNAND SMCLK cycle
OneNAND Clock High time
OneNAND Clock Low time
OneNAND CSn Setup time to SMCLK
OneNAND Initial Access time
OneNAND Burst Access time valid SMCLK to Output delay
OneNAND Data Hold time from next clock cycle
OneNAND Output Enable to Data
OneNAND CSn Disable to Output High Z
OneNAND OEn Disable to Output High Z
OneNAND Address Setup time to SMCLK
OneNAND Address Hold time to SMCLK
OneNAND ADRVALID Setup time to SMCLK
OneNAND ADRVALID Hold time to SMCLK
OneNAND Write Data Setup time to SMCLK
OneNAND Write Data Hold time to SMCLK
OneNAND WEn Setup time to SMCLK
OneNAND WEn Hold time to SMCLK
OneNAND ADRVALID high to OEn low
OneNAND SMCLK to RDY valid
OneNAND SMCLK to RDY Setup time
OneNAND RDY Setup time to SMCLK
OneNAND CSn low to RDY valid
OneNAND Access time from CSn low
OneNAND Asynchronous Access time from ADRVALID low
OneNAND Asynchronous Access time from address valid
OneNAND Read Cycle time
OneNAND ADRVALID low pulse width
OneNAND Address Setup to rising edge of ADRVALID
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
41-16
Specifications and information herein are subject to change without notice.
Table 41-9. OneNAND Bus Timing Constants
Parameter
S3C6400X
RISC MICROPROCESSOR
Symbol
Min
t
15
CLK
t
5
CLKH
t
5
CLKL
t
6
CES
t
IAA
t
BA
t
3.5
BDH
t
OE
t
CEZ
t
OEZ
t
5
ACS
t
6
ACH
t
5
AVDS
t
6
AVDH
t
5
WDS
t
2
WDH
t
5
WES
t
6
WEH
t
0
AVDO
t
RDYO
t
RDYA
t
RDYS
t
CER
t
CE
t
AA
t
ACC
t
76
RC
t
12
AVDP
t
5
AAVDS
Max
Unit
ns
ns
ns
ns
70
ns
11.5
ns
ns
20
ns
20
ns
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11.5
ns
11.5
ns
11.5
ns
15
ns
76
ns
76
ns
76
ns
ns
ns
ns
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