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ELECTRICAL DATA
Figure 41-17. LCD Bypass Data for write and read timing diagram
(VDDINT= 1.0V± 0.05V, TA = -40 to 85°C, VDDLCD = 3.3V ± 0.3V, 2.5V ± 0.25V, 1.8V ± 0.15V)
Parameter
Host Address to LCD Chip Select
tA2CS
Host Chip Select to LCD Chip Select
tC2CS
Host Address to LCD Read Select
tA2RS
Host Chip Select to LCD Read Select
tC2RS
Host Write Enable to LCD Write Enable
tWE2WE
Host Read Enable to LCD Read Enable
tOE2OE
tWD
Host Read Data from LCD Data
tRD
Note ) Output load is 30pF at room temperature (25℃)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
41-30
Specifications and information herein are subject to change without notice.
Table 41-16. LCD Bypass timing Timing
Description
Host Write Data to LCD Data
S3C6400X
RISC MICROPROCESSOR
Min (ns)
Max (ns)
7
29
7
29
7
25
7
25
7
22
7
26
5
23
8
30
Notes
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