Samsung S3C6400X User Manual page 1172

ELECTRICAL DATA
Table 41-12. Memory Interface Timing Constants (Mobile DDR)
(VDDINT= 1.0V± 0.05V, TA = -40 to 85°C, VDDM1 = 2.5V ± 0.25V, 1.8V ± 0.15V )
Parameter
DDR SDRAM Address Delay
DDR SDRAM Chip Select Delay
DDR SDRAM Row active Delay
DDR SDRAM Column active Delay
DDR SDRAM Byte Enable Delay
DDR SDRAM Write enable Delay
DDR SDRAM Output data access time from CK
DDR SDRAM Row Precharge time
DDR SDRAM RAS to CAS delay
DDR SDRAM Write recovery time
DDR SDRAM Clock low level width
DDR SDRAM Read Preamble
DDR SDRAM Read Postamble
DDR SDRAM Write Postamble time
DDR SDRAM Clock to valid DQS-In
DDR SDRAM DQS-In Setup time
DDR SDRAM DQS-In Hold time
DDR SDRAM DQS-In high level width
DDR SDRAM DQS-In low level width
DDR SDRAM read Data Setup time
DDR SDRAM output Data Delay
DDR SDRAM DQS Delay
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
41-24
Specifications and information herein are subject to change without notice.
S3C6400X
Symbol Min
SAD 1.69
t
SCSD 2.09
t
SRD 1.88
t
SCD 1.63
t
SBED -0.06
t
SWD 2.24
t
SAC 2.00
t
RP 22.50
t
RCD 22.50
t
WR 12.00
t
CL 3.38
t
RPRE 6.75
t
RPST 3.00
t
WPST 3.00
t
DQSS 5.63
t
WPRES 1.30
t
WPREH 1.30
t
DQSH 3.00
t
DQSL 3.00
t
DDS -
t
DDD -0.05
t
DQSD -0.30
t
RISC MICROPROCESSOR
Max Unit
5.61 ns
5.27 ns
4.67 ns
3.96 ns
0.02 ns
5.51 ns
6.00 ns
ns
ns
ns
4.12 ns
8.25 ns
4.50 ns
4.50 ns
9.37 ns
ns
ns
4.50 ns
4.50 ns
0.70 ns
0.26 ns
0.83 ns